Elenco Understanding Logic Gates and Circuits Manuel d'utilisateur télécharger pdf (Page 30)

Quiz

4. Explain why S=R=1 is not allowed for the S-R NOR circuit.

5. Using De Morgan’s laws, show how you can derive the S-R NAND gate circuit from the S-R

NOR circuit. Note that the outputs of an S-R NOR latch are the opposite of the S-R NAND

latch.

6. Draw the truth table for the circuit below?

30

A

Q

B

Q

Input

(A)

Input

(B)

Output

(Q)

Output

(Q)

0 0

1 0

0 1

1 1

1 2 ... 25 26 27 28 29 30 31 32 33 34 35 ... 41 42

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